Aishwarya Subramanian

I am a Design Verification Engineer with a strong background in crafting scalable and reusable verification environments. My expertise lies in collaborating with cross-functional teams to bridge the gap between design and functionality. I am dedicated to defining verification strategies, creating testbenches, and analyzing coverage metrics to reduce risk, accelerate development, and enhance product confidence.

At VLSIGURU, I led the development of an advanced verification framework that optimized simulation efficiency and improved overall testbench performance by 15%. My proactive validation strategies have resulted in a 20% decrease in post-silicon bugs, showcasing my commitment to quality and efficiency in the verification process. I have also streamlined verification methodologies, leading to a 10% reduction in verification cycle time, which has significantly contributed to project success.

With a Bachelor of Engineering in Electronics and Communication Engineering, I have a solid foundation in digital electronics and verification methodologies. My project experience includes designing and verifying memory modules using Verilog, where I implemented industry-standard methodologies to achieve high functional and code coverage. I am passionate about continuous learning and professional growth, and I am eager to contribute my skills to innovative projects.