Neeraja Hemadri User
@neerajahemadriuser
Post-Silicon Validation Engineer with expertise in ATE testing.
What I'm looking for
I am a Post-Silicon Validation Engineer with nearly three years of experience at Tessolve Semiconductor Services Pvt. Ltd. My work primarily involves utilizing the Advantest V93K ATE tester platform, where I have developed and integrated various test flows for AI-based compute chips, network chips, and server chips. My role encompasses detailed debugging and validation processes, ensuring that products meet stringent quality benchmarks.
Throughout my career, I have led multiple projects, including the integration of test programs and the execution of data collection and analysis. I have a strong background in analog testing and pre-silicon checks, which allows me to ensure vector delivery readiness and effective test methodologies. My collaboration with DFT teams has been instrumental in resolving functional and characterization issues, further enhancing the quality of our products.
Experience
Work history, roles, and key accomplishments
Post-Silicon Validation Engineer
Tessolve Semiconductor Services Pvt. Ltd.
Aug 2022 - Present (2 years 11 months)
Led Post-Silicon Validation activities for AI-based Compute Chips, Network Chips, and Server Chips, focusing on analog and digital validation at various stages of product lifecycle. Conducted test program integration, developed base Test Programs (TP), and performed detailed debugging and validation on Advantest V93K Tester Platforms (SMT7, SMT8).
Education
Degrees, certifications, and relevant coursework
JNTU Kakinada
Bachelor of Technology, Electronics and Communication Engineering
Grade: 9.5
Completed a Bachelor of Technology in Electronics and Communication Engineering. Achieved a CGPA of 9.5.
Tech stack
Software and tools used professionally
Availability
Location
Authorized to work in
Job categories
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