Open to opportunities

Nitu Kumari

@nitukumari

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Experienced ASIC Verification Engineer specializing in pre-silicon validation.

India

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What I'm looking for

I am looking for opportunities that foster innovation and collaboration, with a focus on challenging projects in ASIC verification.

I am an ASIC Verification Engineer with over 5 years of experience in pre-silicon validation, currently working at Intel Technology in Bengaluru. My expertise lies in validating test chips using OVM/UVM methodologies, where I have successfully worked on various IPs including memory validation and PCIe transaction layers. I have developed comprehensive test plans, test cases, and simulation environments to ensure the integrity and functionality of complex memory systems.

Throughout my career, I have been recognized for my contributions at Intel, receiving multiple awards for my commitment to excellence. My experience spans across analyzing coverage reports, constrained random verification, and debugging failures to maximize coverage. I am proficient in various protocols such as AMBA APB and have a solid foundation in programming languages like Python, as well as HDL HVLs including Verilog and System Verilog.

Experience

Work history, roles, and key accomplishments

Current

Pre Silicon Validation Engineer

Current

Intel Technology

Mar 2022 - Present (3 years 2 months)

Currently working on IP validation of test chips using OVM/UVM methodologies. Involved in verifying various memory types and developing test plans and cases for functional memory controllers. Experienced in constrained random verification and analyzing coverage reports.

PCIe Verilog Python Test Planning

Verification Engineer

Mirafra Technology

Oct 2021 - Apr 2022 (6 months)

Analyzed regression results and reported failures in PCIe transaction layer. Collaborated with the team for prompt resolution of issues.

PCIe Team Collaboration

Verification Engineer

Scaledge India Pvt Ltd

Oct 2019 - Oct 2021 (2 years)

Developed test cases for PCIe transaction layer and AMBA APB protocol verification. Created UVM environments and conducted verification of various designs including synchronous RAM.

PCIe Verilog Testing Design

Education

Degrees, certifications, and relevant coursework

National Institute of Technology Sikkim

Bachelor of Technology, Electronics & Communication Engineering

2015 - 2019

Bachelor of Technology in Electronics & Communication Engineering. Developed various projects including design and verification of synchronous RAM and full adder. Gained practical experience in UVM methodology and test bench architecture.