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Battinapati Durga Manohar

@battinapatidurgamano

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VLSI verification engineer skilled in SystemVerilog/UVM, delivering robust RTL and coverage-driven verification.

India

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What I'm looking for

I seek a hands-on verification or RTL role at a collaborative company where I can apply UVM/SystemVerilog skills, grow in SoC verification, and contribute to reliable silicon delivery.

I am a VLSI verification engineer focused on RTL design and UVM-based verification, with hands-on experience in assertion-based testing and coverage-driven methodologies.

During professional training at Maven Silicon I developed RTL and UVM environments, implemented assertions and scoreboards, and performed regression testing with industry-standard EDA tools such as Synopsys VCS and Mentor QuestaSim.

My projects include an AHB-to-APB bridge, a packet-based 1x3 router, and a loadable up/down counter, where I built constrained-random testbenches, achieved high functional coverage, and applied SVA assertions.

I also have embedded systems experience building AI-enabled solutions using ESP32/Arduino and a TensorFlow/OpenCV plant disease detection model, reflecting my interest in bridging hardware verification with AI/embedded integration.

Experience

Work history, roles, and key accomplishments

Current

VLSI Verification Trainee

Current

Maven Silicon

May 2025 - Present (8 months)

Gained hands-on experience developing RTL designs and UVM-based verification environments, implemented assertions, scoreboards, and coverage-driven testbenches, and performed regression testing using industry-standard EDA tools.

Verilog Synopsys VCS QuestaSim Debugging

Current

VLSI Design Trainee

Current

Maven Silicon

May 2025 - Present (8 months)

Gained hands-on experience in RTL design and UVM-based verification, implemented assertions, scoreboards, and coverage-driven testbenches, and performed regression testing with industry EDA tools.

Verilog Synopsys VCS QuestaSim RTL

AI-Embedded Systems Intern

RoboCoupler

Jan 2025 - Mar 2025 (2 months)

Developed embedded automation systems using ESP32 and Arduino, built a computer-vision plant disease detection model with 98% accuracy, and collaborated on testing, debugging, and performance analysis.

ESP32 Arduino Python TensorFlow OpenCV Embedded Systems IoT

Education

Degrees, certifications, and relevant coursework

Vignan's Institute of Information Technology

Bachelor of Technology, Electronics and Communication Engineering

2021 -

Activities and societies: Projects include AHB-to-APB bridge, 1x3 router, loadable up/down counter; hands-on experience with Verilog, SystemVerilog, UVM, and EDA tools.

Pursuing B.Tech in Electronics and Communication Engineering with coursework and projects in RTL design, verification, and embedded systems.