Vijayalakshmi Aravapalli

At YOUNGMINDS SOFTWARE SOLUTIONS, TIRUPATI, I worked as a Circuit Design Engineer on technical design blocks for TSMC technology nodes. I collaborated with engineering teams and used Cadence Innovus in the workflow.

In my BLOCK 1 project, I worked on timing-driven physical design using Innovus in TSMC 0.13µm technology. My work included floor planning, power planning, placement, CTS, RC extraction, timing analysis, and filler cell insertion.

I also performed synthesis with Genus for COUNTER_16, including timing, area, and power optimization, and worked on SDC/TCL scripting and timing extraction. My training includes VLSI Physical Design at Silicon Systems Pvt Ltd., Hyderabad.