AKAman K
@amank1
SoC/IP verification engineer specializing in SV/UVM, protocol VIPs, and debug automation.
IndiaWhat I'm looking for
I am a SoC/IP verification engineer with extensive hands-on experience developing and supporting SV/UVM-based VIPs for protocols such as I2C, I3C, SPI, AHB and APB. I have worked across verification roles at Synopsys, Cadence, UST Global and Incise Infotech, delivering VIP enhancement, regression analysis and issue support for top semiconductor clients.
My achievements include creating and debugging verification environments, achieving 100% toggle coverage for assigned subsystems, driving UVM internal enhancements and coordinating regressions reporting to IEEE working groups. I bring strong C/C++, Verilog/SystemVerilog, scripting (Perl, Shell) skills and tool expertise (VCS, Questa, NCSIM, Verdi, ClearCase, Git).
I look for engineering roles where I can apply deep verification expertise to complex SoC/IP challenges, contribute to automation and VIP development, and collaborate with cross-functional teams to deliver robust silicon verification solutions.
Experience
Work history, roles, and key accomplishments
SIWorking on SV/UVM VIPs for I2C/I3C/SPI, delivering enhancements and support across logical, electrical and timing-spec parameters to improve VIP robustness and issue resolution.
CSPerformed UVM internal enhancements, regression analysis and test-failure reporting for UVM library editions, coordinating with the IEEE UVM working group on regressions.
Senior Engineer
UST Global
Jul 2020 - Oct 2021 (1 year 3 months)
Led SoC and IP verification engagements for clients (Samsung, STM) including UVM environment bring-up, test automation, verification plan creation and coverage implementation.
Intern
3ST Technologies
Jan 2017 - Jun 2018 (1 year 5 months)
Internship involving domain exposure to verification and EDA tooling supporting project tasks and learning RFC workflows.
Field Application Engineer
Cadre Design Systems
Sep 2015 - Dec 2016 (1 year 3 months)
Delivered TCAD tool trainings and demos, managed faculty development programs and provided post-sales client support for EDA tools and licensing.
Education
Degrees, certifications, and relevant coursework
Uttar Pradesh Technical University
Bachelor of Technology, Electronics & Communication
2011 - 2015
Grade: 67.53%
Completed a B.Tech. in Electronics & Communication with focus on digital electronics and verification methodologies.
RPVV (Rajkiya Pratibha Vikas Vidyalaya)
XII Standard (CBSE), Higher Secondary
2009 - 2010
Grade: 70.60%
Completed XII Standard under CBSE curriculum.
RPVV (Rajkiya Pratibha Vikas Vidyalaya)
X Standard (CBSE), Secondary
2007 - 2008
Grade: 78.80%
Completed X Standard under CBSE curriculum.
Availability
Location
IndiaAuthorized to work in
Job categories
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