K P Ruchitha

I am a dedicated and detail-oriented graduate with a Bachelor’s degree in Electronics and Communication Engineering. I am eager to apply my academic knowledge and hands-on experiences with industry-standard EDA tools to contribute to innovative semiconductor design projects. My education has equipped me with a solid foundation in physical design methodologies, and I am excited to leverage this knowledge in a professional setting.

During my internship at Chipegde Technologies Pvt Ltd, I gained practical experience in analyzing RTL design specifications, executing synthesis runs, and collaborating on floor planning to optimize chip area and power distribution. I have successfully participated in power planning activities, executed cell placements, and designed clock trees, all while ensuring adherence to design rules and signal integrity. My commitment to achieving timing closure through Static Timing Analysis (STA) has honed my skills in delivering high-performance, low-power integrated circuits.