BG

Looking for a job

Bala Venkateswara Gupta

@balavenkateswaragupt

Design Verification Engineer at Soctronics, verifying AMD Audio IP across two SoC programs and validating low-power behavior.

What I'm looking for

I’m looking to grow as a Design Verification Engineer by contributing to complex SoC verification projects while strengthening my expertise in SystemVerilog-based verification, protocol validation, and low-power verification methodologies.

At Soctronics, I verified AMD Audio IP subsystems across two SoC programs, working on IP-A v2 in the first project and enhanced IP-A v3 and IP-B in the next.

I modified legacy testcases and developed feature-specific verification scenarios. I also debugged regression failures with Synopsys Verdi and analyzed coverage reports to target uncovered bins.

I executed Native Low Power simulations to validate Audio IP power management behavior and contributed to bringing up a new simulation tool in the existing verification infrastructure. My training at VEDA IIT covered Verilog, SystemVerilog, and UVM.

Experience

Work history, roles, and key accomplishments

SO

Design Verification Engineer

Soctronics

Apr 2023 - May 2026 (3 years 1 month)

Owned and executed complete deployment-level verification for Audio IP subsystems across two SoC programs. Enhanced legacy testcases, developed feature-specific scenarios, and performed regression debugging and coverage analysis.

SystemVerilog UVM Methodology AXI AMD Proprietary Protocols Verilog C C++Python Perl UNIX Shell Scripting Synopsys VCS Synopsys Verdi Perforce Low Power Verification Coverage Analysis Regression Testing

VI

Design Verification Trainee

VEDA IIT

Aug 2022 - Apr 2023 (8 months)

Trained in Verilog, SystemVerilog, and UVM verification methodology.

Verilog SystemVerilog UVM Methodology

Education

Degrees, certifications, and relevant coursework

PT

Prasad V. Potluri Siddhartha Institute of Technology

Bachelor of Technology, Electronics & Communication Engineering

Grade: CGPA: 7.89

Pursued a Bachelor of Technology in Electronics & Communication Engineering, achieving a CGPA of 7.89.

BC

Bapatla Polytechnic College

Diploma, Electronics & Communication Engineering

Grade: 87.4%

Completed a Diploma in Electronics & Communication Engineering with a score of 87.4%.

Tech stack

Software and tools used professionally

Perforce

Python

Perl

C++

C

Verilog

Availability

Looking for a job

Location

India

Authorized to work in

Salary expectations

2500k+ INR

Social media

Job categories

Design Verification Engineer

Skills

Design Verification SoC Verification Audio IP Verification SystemVerilog Verilog UVM Methodology AXI AMD Proprietary Protocols Native Low Power Simulation Coverage Analysis Regression Testing Waveform Debugging C C++Python

Interested in hiring Bala Venkateswara?

You can contact Bala Venkateswara and 90k+ other talented remote workers on Himalayas.

Message Bala Venkateswara

People also viewed

View all talent

Get matched with your dream remote job

Sign up now and join over 250,000+ remote workers who receive personalized job alerts, curated job matches, and more for free!