akhil User

At Semtech Corporation, I designed a reusable SystemVerilog/UVM verification environment for an AXI4, APB, and AHB-Lite DMA subsystem. I also verified DMA datapaths covering endpoint transactions, DMA descriptors, and packet buffering.

I authored SystemVerilog Assertions for protocol compliance and DMA state transitions, and applied formal verification to control paths. I drove functional coverage closure and used Synopsys VCS and Verdi to analyze RTL and debug protocol issues.