At Centre for Development of Advanced Computing (C-DAC), I developed a C++ reference model for a GPU Thread Block Scheduler. It models dispatch, resource allocation, scheduling, occupancy, and completion tracking for functional verification and DUT correlation.
I also developed a Python-based test-vector generator for an AI accelerator wrapper. It generates ISA instruction streams and input, weight, and bias data for configurable matrix dimensions and data types, with separate output files that preserve dimensions and data ordering.
At ST Microelectronics, I implemented primary and secondary snapshot methodologies on the G5 processor using Synopsys TetraMAX, and ran regressions with 25K+ ATPG patterns in Cadence vManager. I also evaluated fault models on the P7 processor and developed a Shell script to correlate failing patterns with failing flops.
During my AI/ML internship at Infosys, I used KNN after autoencoder preprocessing to detect anomalies in a smartphone dataset, achieving 93% accuracy. I also implemented methods for video anomaly detection and achieved 93.7% accuracy.
