Open to opportunities

Sathvika Lakkasandram

@sathvikalakkasandram

Message

I design and verify VLSI RTL, protocol bridges, and digital systems using Verilog and SystemVerilog.

India

Message

What I'm looking for

I'm seeking an opportunity in the electronics industry where I can contribute VLSI design, RTL, verification, and digital engineering skills while continuing to grow through hands-on technical work.

I've designed an AHB-to-APB protocol bridge in Verilog using an FSM for transaction control, validating it through testbenches and waveform analysis. I also built a 3D CNN accelerator using the AXI4 bus to optimize memory bandwidth and reduce data-transfer latency for real-time processing.

At Ramaiah Skill Academy, I gained hands-on SoC RTL design and testbench verification experience, using Synopsys tools for lint, CDC, synthesis, and static timing analysis. My hardware testing internship at Meltronics Systemtech involved validating PCBs used in critical aircraft systems.

Experience

Work history, roles, and key accomplishments

VLSI SoC Design Trainee

Ramaiah Skill Academy

Oct 2024 - Jan 2025 (3 months)

Hands-on experience in designing and verifying System-on-Chip (SoC) architectures, including RTL design and testbench verification. Trained in using industry-standard tools like Synopsys for lint, CDC, synthesis, and static timing analysis.

RTL Design Linting CDC Synthesis Static Timing Analysis

Education

Degrees, certifications, and relevant coursework

International Institute of Information Technology Bangalore

Post Graduate Diploma, Advanced VLSI

2025 - 2025

Pursued a PG Diploma in Advanced VLSI, covering advanced digital electronics, Verilog, SystemVerilog, UVM, and functional verification.

Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology

Bachelor of Technology, Electronics and Communication

2020 - 2024

Grade: 7.53

Completed B.Tech in Electronics and Communication with a GPA of 7.53, covering core subjects including VLSI, digital system design, and signal processing.