Dousik Manokaran
@dousikmanokaran
I build pipelined RISC-V processors and RTL hardware blocks for efficient digital systems.
IndiaWhat I'm looking for
I designed HaDes-V, a 5-stage in-order RV32I RISC-V processor with data forwarding to resolve hazards without pipeline stalls, earning the highest scores across peripheral testbench evaluations.
At Lyle Technologies, I built an Icarus Verilog simulation environment for an RV32IMAF core and automated workflows with Python. I also designed hardware blocks for swarm recovery and a parallel keypad controller, with hands-on work in Verilog, SystemVerilog, simulation, and waveform debugging.
Experience
Work history, roles, and key accomplishments
Intern
Lyle Technologies LLP
May 2026 - Jun 2026 (1 month)
Developed an Icarus Verilog simulation environment for a 5-stage pipelined RV32IMAF RISC-V core, resolving mixed-language compilation failures and Xilinx Primitives incompatibilities. Automated simulation workflows with Python scripts and diagnosed pipeline stalls using waveform analysis.
Trainee
Chip Design Studio, IIIT Bangalore
Jan 2026 - Feb 2026 (1 month)
Designed QSSE, a pipelined hardware block for swarm leader selection, achieving 84% lower power. Directed a predictive QSTU to establish a deterministic, hard real-time system for autonomous swarm recovery.
Education
Degrees, certifications, and relevant coursework
PSG Institute of Technology and Applied Research
Bachelor of Engineering, Electronics and Communication Engineering
2023 -
Grade: CGPA: 9.04
Pursuing a Bachelor of Engineering in Electronics and Communication Engineering with a CGPA of 9.04.
HDL2Chips
Fundamentals of Verilog, Verilog
Completed the Fundamentals of Verilog certification in July 2026.
Udemy
Verilog for an FPGA Engineer with Xilinx Vivado Design Suite, Verilog
Completed the Verilog for an FPGA Engineer with Xilinx Vivado Design Suite certification in June 2025.
Yuva Bharathi Public School (CBSE)
Senior Secondary, General Studies
2022 - 2023
Grade: 95.4%
Completed Senior Secondary education with a score of 95.4%.
Yuva Bharathi Public School (CBSE)
Secondary, General Studies
2020 - 2021
Grade: 94.8%
Completed Secondary education with a score of 94.8%.
Harvard University
CS50's Introduction to Programming with Python, Computer Science
Completed CS50's Introduction to Programming with Python in August 2023.
Availability
Location
IndiaAuthorized to work in
Portfolio
github.com/M-DOUSIKSalary expectations
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