Looking for a job

Keerthana M

@keerthanam

Message

I build synthesizable RTL designs and grow practical VLSI design-flow expertise.

India

Message

What I'm looking for

I'm looking to deepen my experience across the VLSI design flow through RTL design projects, synthesizable hardware development, and collaborative engineering work.

I'm building practical RTL design experience at CDAC Bangalore, where I work on real-time RTL design projects and strengthen my understanding of digital system implementation.

My work focuses on efficient, synthesizable hardware using Verilog and SystemVerilog, supported by VLSI fundamentals, CDC, RDC, STA, simulation, and FPGA programming.

I earned a BE (Honours) in Electronics and Communication Engineering from Government College of Engineering, Salem, and previously trained as a Graduate Engineering Trainee at Forge Innovation & Ventures. I'm passionate about expanding across the complete VLSI design flow while contributing effectively in collaborative environments.

Experience

Work history, roles, and key accomplishments

Graduate apprentice

CDAC Bangalore

Sep 2025 - Sep 2026 (1 year)

Gaining a strong foundation in VLSI fundamentals and engaging in real-time RTL design projects has enhanced my practical knowledge, problem-solving ability, and understanding of digital system implementation.