Open to opportunities

Deepthi User

@deepthiuser

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B.Tech graduate skilled in digital design and ATPG techniques.

India

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What I'm looking for

I am seeking opportunities in a dynamic environment that fosters innovation and growth.

I am a B.Tech graduate specializing in digital designs and advanced test pattern generation techniques. With a strong academic background and hands-on experience in scan insertion and compression, I have developed a solid foundation in the field of electronic design automation.

During my professional training at SuccessBridge, I worked on multiple projects involving SOC design and ATPG pattern generation. My responsibilities included defining constraints for scan insertion, fixing DFT rule violations, and performing coverage analysis to improve test coverage. I am proficient in using industry-standard tools such as Synopsys Design Compiler and TestMAX ATPG.

Experience

Work history, roles, and key accomplishments

Digital Design Engineer

SuccessBridge

Mar 2023 - Apr 2023 (1 month)

Engaged in ATPG pattern generation and simulation, focusing on building ATPG models and performing DRCs. Responsibilities included running ATPG and conducting fault simulations.

Fault Simulation TestMAX ATPG RTL Scan Insertion Scan Compression Verilog

Digital Design Engineer

SuccessBridge

Feb 2023 - Mar 2023 (1 month)

Contributed to hierarchical scan synthesis projects, focusing on scan insertion and compression logic. Responsibilities included reading netlists, checking DFT rule violations, and saving updated test protocols.

Scan Insertion DFT Rule Violations Scan Compression Design Compiler TestMAX DFT RTL Fault Simulation Verilog

Digital Design Engineer

SuccessBridge

Jan 2023 - Feb 2023 (1 month)

Worked on multiple projects focusing on scan insertion, ATPG, and DFT rule violations in a 28nm design environment. Responsibilities included defining constraints, fixing DFT violations, and conducting coverage analysis for test improvement.

Scan Insertion DFT Rule Violations Scan Compression Coverage Analysis Fault Simulation Design Compiler TestMAX ATPG Verilog

Education

Degrees, certifications, and relevant coursework

Audisankara College of Engineering & Technology

Bachelor of Technology, Engineering

2020 - 2024

Grade: 81.70%

Pursued a Bachelor of Technology in Engineering with a focus on digital designs and test methodologies. Achieved a high academic performance with a percentage of 81.70%. Developed skills in scan insertion, scan compression techniques, and ATPG.