Open to opportunities

dasari lakshmiprasanna

@dasarilakshmiprasann

Message

I build low-latency edge AI on FPGA using hardware-accelerated ML systems.

India

Message

What I'm looking for

I’m looking to build scalable, efficient edge AI solutions with FPGA hardware-software co-design—focused on real-time, low-latency inference for biomedical, speech, and security applications.

I’m a PhD graduate in Electronics & Communication Engineering specializing in edge AI systems, FPGA acceleration, and embedded machine learning deployment. I design real-time, hardware-accelerated AI pipelines for applications including intrusion detection, assistive technologies, and biomedical signal processing.

Through my FPGA Development Intern role at ChipTip Technology, I designed and deployed a neural network–based Intrusion Detection System (IDS) on Xilinx Alveo AU200 for real-time packet classification. I integrated Python-based ML models into FPGA inference pipelines, optimized latency and FPGA resource utilization, and collaborated with cross-functional teams to validate system-level performance.

In my PhD research at Lovely Professional University, I developed real-time FPGA-based AI systems for speech and biomedical signal classification and built low-power embedded inference architectures for assistive technologies. I also created DSP pipelines for EEG and audio processing with hardware acceleration and published multiple IEEE/Springer research papers in embedded AI and signal processing.

Experience

Work history, roles, and key accomplishments

FPGA Development Intern

ChipTip Technology

Jan 2025 - Jan 2026 (1 year)

Designed and deployed a neural network–based intrusion detection system on Xilinx Alveo AU200 for real-time packet classification, integrating Python ML models into FPGA inference pipelines. Optimized latency and FPGA resource utilization and collaborated to validate system-level performance.

FPGA Acceleration Python Xilinx Alveo AU200 Vivado Vivado HLS System Integration Real Time Packet Classification

PhD Research Scholar

Lovely Professional University

Jan 2020 - Jan 2026 (6 years)

Developed real-time FPGA-based AI systems for speech and biomedical signal classification and designed low-power embedded inference architectures for assistive technologies. Built DSP pipelines for EEG and audio processing with hardware acceleration and published IEEE/Springer research papers.

Signal Processing EEG Signal Processing Hardware Software Co Design

AI/ML Intern

IntelliSense

Jan 2025 - Present (1 year 4 months)

Researched Wi-Fi sensing and CSI data analysis and implemented ML models for occupancy detection using real-time data. Performed signal pre-processing (Z-score normalization, filtering, feature extraction) and visualized time-domain and frequency-domain characteristics.

CSI Data Analysis Machine Learning Signal Processing Feature Extraction Data Visualization

Engineering Intern

Ordnance Factory Medak

Contributed to PCB design and multilayer optimization and developed SystemVerilog testbenches for embedded system verification. Supported embedded hardware verification to improve system reliability.

PCB Design TestBench Development Hardware Verification

Education

Degrees, certifications, and relevant coursework

Lovely Professional University

Ph.D., Electronics & Communication Engineering

2020 - 2026

Pursued a Ph.D. in Electronics & Communication Engineering, focusing on real-time FPGA-based edge AI systems for speech and biomedical signal classification. Built low-power embedded inference architectures and DSP pipelines for EEG and audio processing, publishing research in embedded AI and signal processing.

Amrita Vishwa Vidyapeetham

M.Tech, VLSI Design

2017 - 2019

Completed an M.Tech in VLSI Design, building expertise in hardware design and embedded/accelerated system concepts relevant to FPGA-based workflows.

TKR College of Engineering and Technology

B.Tech, Electronics & Communication Engineering

2013 - 2017

Earned a B.Tech in Electronics & Communication Engineering, establishing the foundational knowledge for later work in embedded systems and hardware design.