venkata guru prasad reddy marthala

I've designed and modeled a multi-precision floating-point arithmetic unit on FPGA using Verilog and VHDL, with an emphasis on processing-layout optimization for high-performance computing requirements.

As a Project Intern with Skilldzire Technologies and EduSkills Foundation, I handled complex layouts, applied engineering design rules to build functional platform structures, and coordinated with cross-functional teams to streamline digital assets and analyze project criteria. I hold a B.Tech in Electronics & Communication Engineering from JNTU Anantapur.