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Charan User

@charanuser8

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FPGA design intern at ADRIN – ISRO who developed PL-to-PS data transfer using NoC on AMD Versal VCK190.

India

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What I'm looking for

I'm seeking opportunities in FPGA, RTL/Digital Design, or VLSI.

At ADRIN – ISRO, I developed a PL-to-PS data transfer architecture using NoC on the AMD Versal VCK190 platform. I worked with AXI interfaces, DDR memory, and Versal CIPS, then implemented and validated the hardware design in Vivado.

I also designed and verified a 32-bit ALU using Verilog and implemented an FSM-based traffic light controller. My training includes Arduino programming and interfacing, and I hold NPTEL Elite certifications in System Design through Verilog and CMOS Digital VLSI Design.

Experience

Work history, roles, and key accomplishments

Arduino Training

Pantech eLearning Pvt. Ltd.

Gained hands-on experience in Arduino programming, interfacing, and embedded applications. Performed hardware integration, debugging, and testing of electronic systems.

Arduino Embedded Systems Hardware Debugging C

FPGA / Versal NoC Data Transfer Intern

ADRIN - ISRO

Developed a PL-to-PS data transfer architecture using NoC on the AMD Versal VCK190 platform. Worked with AXI interfaces, NoC, DDR memory, and Versal CIPS for hardware data movement.

Verilog RTL Design AXI NOC AMD Xilinx Versal VCK190 Vivado PetaLinux DDR Bare Metal C

Education

Degrees, certifications, and relevant coursework

Vignan Institute of Technology and Science

B.Tech, Electronics and Communication Engineering

2023 -

Grade: 7.4/10

Pursuing B.Tech in Electronics and Communication Engineering with a CGPA of 7.4/10. Coursework includes Digital Logic Design, CMOS VLSI Design, Semiconductor Devices, and Signals & Systems.