At Si-Vision (Synopsys IP Solutions contractor), I work on porting SerDes receivers to advanced technology nodes and optimizing them for new technologies. I verify the full receiver chain and optimize critical macros to meet PCIe4, MPHY G5, and USB4 specifications.
I also perform aging, bias-check, and EMIR reliability checks for the receiver. I lead a team of three designers working on different macros.
At the Faculty of Engineering, Ain Shams University, I instruct undergraduate students in tutorials and labs, and create and mark quizzes and assignments. I previously taught Analog Basics and Data Converters tutorials and labs at the Information Technology Institute in Egypt.
As an RF Circuit Designer Intern at Analog Devices Inc, I worked on RF transceiver system and chain line-up, and design approaches for LNA, Mixer, PA, and Oscillators. My graduation project was a Class AB Power Amplifier for 5G-Transceivers, and my M.Sc. thesis focused on simulating emerging transistors for low-power applications.

