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Marwan Ahmed

@marwanahmed2

Digital IC design and verification engineer with silicon tapeout experience, including a TinyECG arrhythmia classifier taped out to Sky130.

Egypt

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At STMicroelectronics, I designed RTL for matrix inversion and image compression, enhanced a DMA controller, and developed embedded C firmware for hardware validation and peripheral bring-up.

I also taped out Q-PULSE, a TinyECG arrhythmia classifier, as mixed-signal Sky130 silicon. My projects include a five-stage RISC-V core with L1 cache and AXI, a MIPI D-PHY TX/RX PHY verified with UVM, and an ARM Cortex-M0 SoC integrated with a Zynq MPSoC.

Experience

Work history, roles, and key accomplishments

Digital Design Intern

STMicroelectronics

Jul 2024 - Jan 2025 (6 months)

Designed RTL for matrix inversion using LDL decomposition and verified with functional testbenches. Implemented an image-compression algorithm in RTL from a MATLAB reference model and enhanced a DMA controller for burst transfers and multiple peripherals.

RTL Design SystemVerilog Verilog Matlab DMA Embedded C Firmware Debugging Functional Verification

Education

Degrees, certifications, and relevant coursework

Kareem Waseem

Diploma, Digital Verification

2024 - 2024

Completed a Digital Verification Diploma with two UVM environments from scratch, focusing on coverage-driven planning, constrained randomization, SVA, and scoreboarding.

Ain Shams University

Bachelor of Science, Electronics and Communication Engineering

Grade: 3.24

Bachelor of Science in Electronics and Communication Engineering, graduated in July 2024 with a GPA of 3.24.

Ali El-Temsah

Diploma, Digital IC Design

2023 - 2023

Completed a Digital IC Design Diploma covering UART subsystem design and full RTL-to-GDS flow including synthesis, formal equivalence, STA, CDC, and scan DFT.