I'm designing a dynamic-accuracy configurable arithmetic unit for energy-efficient image processing using Verilog HDL, Vivado, and MATLAB. My quantitative trade-off model shows preliminary potential for 25% lower power and 70% fewer registers versus a conventional baseline.
On this project, I lead a five-member team through research, technical analysis, implementation planning, and design evaluation. We use accuracy–power trade-offs to guide decisions.
I also built Python-based transaction exception monitoring and Tableau dashboards, and a Power BI supply chain analytics solution using DAX and Power Query. These projects helped surface review exceptions, quantify transaction value under review, and identify late-delivery and revenue-concentration patterns.
