Lalit Singh Kharayat
@lalitsinghkharayat
Software engineer building AI/ML, GenAI RAG, and backend automation systems that scale.
What I'm looking for
I’m a Software Engineer with hands-on experience across AI/ML, Generative AI, Retrieval-Augmented Generation (RAG), backend systems, and intelligent automation. I’ve interned at National Instruments (NI) and the Indian Institute of Science (IISc), and I focus on building production-grade pipelines and systems that are reliable under real constraints.
At IISc (SPIRE Lab), I designed and deployed scalable annotation and data management workflows for 2,000+ real-time MRI (rtMRI) and audio samples, improving data retrieval speed by 40% through optimized indexing and automated workflows. I worked on temporal alignment using Dynamic Time Warping (DTW), implemented FCN-based semantic segmentation for vocal tract boundary delineation, and engineered end-to-end ML pipelines for acoustic-to-articulatory inversion with transformer-based sequence modeling.
At NI, I engineered automated PMIC validation systems using custom pin-centric architectures and LabVIEW frameworks, reducing manual testing and improving test automation efficiency. I also optimized ADC/DAC signal accuracy and designed/deployed “Zero-Volt” e-Load systems for hardware validation in extreme edge-case conditions—while keeping a strong bias toward measurable outcomes. Outside internships, I’ve built an LLM-powered RAG document Q&A app deployed on Hugging Face Spaces, and delivered IoT-enabled edge ML projects for virtual fencing and real-time skin abnormality detection.
Experience
Work history, roles, and key accomplishments
Research Intern
Indian Institute of Science (IISc), SPIRE Lab
Nov 2023 - Present (2 years 8 months)
Developed and deployed scalable annotation and data management pipelines for 2,000+ rtMRI and audio samples, improving data retrieval speed by 40% through optimized indexing and automation. Worked on temporal alignment (DTW), FCN-based semantic segmentation for vocal tract boundaries, and end-to-end acoustic-to-articulatory inversion pipelines using transformer-based sequence modeling.
Software Engineer Intern
National Instruments (NI)
Jan 2025 - Jun 2025 (5 months)
Engineered automated PMIC validation systems using pin-centric architectures and LabVIEW, reducing manual testing effort and improving test automation efficiency. Optimized signal chain accuracy for ADC/DAC characteristics, and designed/deployed zero-volt e-Load systems to validate power delivery under extreme edge-case conditions.
Education
Degrees, certifications, and relevant coursework
Ramaiah Institute of Technology
Electronics and Instrumentation Engineering
2021 - 2025
Grade: 8.13 CGPA
Studied Electronics and Instrumentation Engineering at Ramaiah Institute of Technology (CGPA: 8.13) from Dec 2021 to Jul 2025.
Availability
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Authorized to work in
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