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21_Sandarva Das

@21_sandarvadas

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I build and simulate analog, mixed-signal, embedded, and IoT hardware systems.

India

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What I'm looking for

I'm seeking a challenging hardware engineering role where I can contribute to analog/mixed-signal design, CMOS simulation, embedded systems, and hardware research while continuing to grow through hands-on engineering work.

I've characterised cryogenic 6T SRAM and DRAM cells using LTspice, analysing noise margins, threshold-voltage shifts, write-margin degradation, and noise-limited readout performance across −196°C to 100°C. My work spans analog and mixed-signal design, CMOS device physics, ADC/DAC architectures, PLL fundamentals, and hardware simulation.

I've also co-developed an ESP32 gesture-controlled ROV interface, integrated Raspberry Pi and YOLO-based visual feedback, and co-authored a Springer publication on IoT waste management using ant colony optimisation. I'm looking to bring this simulation-to-analysis and embedded hardware experience to a challenging hardware engineering environment.

Experience

Work history, roles, and key accomplishments

Independent Researcher

St. Thomas' College of Engineering & Technology

Jan 2025 - Dec 2026 (1 year 11 months)

Conducted independent research on cryogenic CMOS characterisation, analyzing SRAM and DRAM stability across temperature sweeps using LTspice simulations. Extracted noise metrics and identified reliability bottlenecks in low-temperature operation.

LTspice CMOS DRAM