Sari Awabdy

SA

Open to opportunities

Sari Awabdy

@sariawabdy

I build FPGA and SystemVerilog hardware designs, from VGA controllers to digital games.

I'm building a VGA display controller in the Technion VLSI Lab, using SystemVerilog and RTL to output image data and integrate Flash memory on an FPGA board. I also use Tiny Tapeout resources for open-source silicon design validation and logic synthesis.

I've collaborated on an FPGA-based digital game deployed with Intel Quartus Prime. Alongside my Computer Engineering studies, I volunteer as a tutor for children diagnosed with cancer, providing tailored academic support and mentorship.

Experience

Work history, roles, and key accomplishments

TT

Computer Engineering Student

Technion - Israel Institute of Technology

Pursuing a B.Sc. in Computer Engineering with coursework in computer science and electrical engineering, including digital systems, electronic circuits, and signals and systems.

C C++FPGA LTspice Intel Quartus Prime

Education

Degrees, certifications, and relevant coursework

TT

Technion - Israel Institute of Technology

Bachelor of Science, Computer Engineering

Pursuing a Bachelor of Science in Computer Engineering with coursework in computer science and electrical engineering.

Tech stack

Software and tools used professionally

Synthesized

Availability

Open to opportunities

Location

Israel

Authorized to work in

Job categories

Hardware Engineer Fpga Engineer Digital Design Engineer VLSI Engineer Embedded Systems Engineer Hardware Design Engineer Electrical Hardware Engineer Computer Hardware Engineer

Skills

C C++Verilog FPGA LTspice Intel Quartus Prime RTL Design VGA Digital Systems Data Structures Synthesized

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