RTL Design and FPGA Prototyping Engineer (GB)

Signaloid provides a computing platform that tracks data uncertainties dynamically and throughout computations in execution workloads. Our computing platform uses deterministic computations on probability distributions associated with all in-processor state to enable orders of magnitude speedup and orders of magnitude lower implementation cost for computing tasks that are traditionally solved using Monte Carlo methods. The platform is primarily available as a cloud-based computing engine that lets you dynamically compile and run computing tasks via a cloud-based task execution API. We also provide on-premises and edge-hardware implementations of our computing platform.

Our platform is the most cost-effective and fastest way to implement uncertainty quantification and is at the same time also the fastest way to perform uncertainty quantification in key use cases. For example, workloads ranging from options pricing and portfolio modeling in finance use cases, to uncertainty quantification for materials modeling and photonics simulation in engineering use cases, are often an order of magnitude or more faster than even the most advanced Monte Carlo methods running on competing computing platforms such as high-end AWS EC2 instances.

Our computing platform is used in applications including materials modeling, autonomous systems, computational finance, machine learning, and noisy intermediate-scale quantum computing. Our team consists of contrarian engineers with combined research, engineering, and leadership experience from Apple, ARC, ARM, Bell Labs, CMU, University of Cambridge, IBM Research, MIT, NEC Labs, and University of Oxford. Find out more at and try out the Signaloid uncertainty-tracking computing platform by signing up for free at https://get.signaloid.io.

Role Description

In this role, you will lead RTL design and FPGA prototyping of edge hardware and cloud-FPGA implementations of Signaloid's compute platform.

Within the first year in this role, you will:

• Be responsible for improving the performance of existing firmware and RTL as well as architecture and design of new firmware and RTL implementations of key system components.
• Be responsible for coordinating with the RTL Implementation team and Compiler Tools Implementation teams to achieve company-wide objectives and key results related to performance, reliability, and implementation quality of Signaloid's processors and computing platforms.
• Be responsible for implementing automated tests and setting up self-hosted continuous integration (CI) runners integrated with GitHub, for both EDA/CAD tools as well as for prototype FPGA-based hardware.
• Contribute to open-source hardware and open-source software tools implementing subsets of Signaloid's technology, such as the Signaloid C0-microSD platform, which Signaloid makes available to support its developer ecosystem.

After a year in this role, you will have the opportunity to:

• Lead new architectural design work across Signaloid's compute architectures.
• Lead the implementation of your own architectural ideas in collaboration with a larger team.
• Contribute to the strategic direction of Signaloid's computing platforms.
• Expand your role to encompass other areas in which you have demonstrated exceptional competence.

Requirements

• Thorough understanding of digital arithmetic and number formats used in modern computing systems.
• Five or more years experience with Verilog RTL.
• Experience with all stages of chip design flow, from RTL to GDS and eventual bringup and ability to carry out tasks within the flow, from design to bringup, yourself.
• Five or more years experience writing low-level C/C++.
• Thorough understanding of Unix environment and Unix tools.
• Experience developing software and hardware for deployment in commercial products.
• A willingness to listen to people until they feel understood.
• An ability to communicate complex engineering ideas succinctly and clearly.
• Honesty, empathy, and a willingness to see the world from the viewpoint of others.

Additional Desirable Skills and Experience:

• Familiarity with Git, GitHub, and GitHub's continuous integration facilities
• Familiarity with Python and Go.
• Strong applied mathematics background (with good working knowledge of probability theory, statistics, Bayesian methods).
• Strong background in the role of uncertainty in measurements and in engineered systems.
• Previous experience with tools for performance monitoring.

Our Recruiting Procedure

• All positions require you to write a brief cover letter that should be no more than one page long. The more concise the better. You can also substitute the cover letter for a snippet of code that will run on the signaloid.io platform; be creative! We use the cover letter / code snippet to screen for communication skills, as clear communication is essential in a remote working environment.
• Applicants who pass the cover letter screening receive an initial 15-minute Zoom screening call with the CEO/CTO.
• Applicants who pass the screening interview will be given a coding project that can be solved using the Free Tier of Signaloid's Signaloid Cloud Developer Platform. We will also provide you with additional free credits on the Signaloid Cloud Developer Platform. The coding exercise will be simple enough to complete in a few hours. You will however have a time window of one week or two weeks (your choice) to complete the coding exercise. You are encouraged to make your implementation open source on GitHub.
• Applicants who successfully complete the coding exercise are invited for a set of interviews with people from our core teams (there will be up to six interviewers). The interviewers will use the project you completed as a discussion point.
• In the final stage, applicants are invited for an on-site (or "virtual on-site") day with members of the team you are interviewing to join. During this day, we will work with you on a hands-on simulation of a real working day solving a task relevant to the position you are applying for, working with your potential future colleagues.

Benefits

A flexible remote-first work environment

• Be part of an international team with the flexibility to choose where you live, as long as you are available during the working hours of 09:00 to 17:00 UK time.
• Join the rest of the team several times each year for an in-person session somewhere in Europe.

Competitive compensation

• Yearly bonus based on company's Objectives and Key Results (OKR) performance and bi-yearly bonus based on your project team's OKR performance.
• Simple transparent compensation across the company, with four pay levels, in all roles, based on skill level: Contributor, Senior Contributor, Lead Contributor, and Principal Contributor.
• All full-time employees receive attractive stock options package.

A driven but respectful environment

• We never speak ill of others even if we differ in our viewpoints; we show up every day with a sense of urgency; we treat each other with respect as though each day were our last.
• No isolated "projects": No person in the team works in isolation and a successful outcome for the thread of work you lead will inherently depend on getting help from (and helping) other members of the team.