AFRY is a European leader in engineering, design, and advisory services, with a global reach. We accelerate the transition towards a sustainable society. We are 18,000 devoted experts in infrastructure, industry, energy and digitalization, creating sustainable solutions for generations to come.
Requirements
- Minimum of 7 years working experience of FPGA code development in VHDL, Verilog and/or System Verilog programming languages
- Experience of FPGA domain crossing designs
- Experience of FPGA timing analyses
- Experience of FPGA floorplanning
- Worked with either AMD/Xilinx or Intel/Altera FPGA:s and tools such as Vivado, ISE, Quartus etc.
- Competency in software scripting languages such as Python and Tcl
- Excellent communication skills in English both orally and in writing
- Bachelor's or Master’s degree in computer science, Electronics Engineering, or a related field
Benefits
- Good benefits
