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@ts08

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SDET at MEXT who raised automated test coverage from 0% to approximately 85%.

United States

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At MEXT, I established automated regression and release processes that supported two beta revisions, two production revisions, first customers, and development partners. I raised automated test coverage from 0% to approximately 85%.

I defined test plans, pull request gates, and release confidence criteria, and introduced defect triage practices. My work helped eliminate approximately 25% of problems and cut failures on the main branch by approximately 50%.

At Advantest, I built and maintained MPT3000 training courses and moved training to an internal online platform using Articulate 360. I also modified C++ SSD test software for NVMe specification revisions and built a pass-through command that helped a customer continue prototype development.

Earlier, I worked on SSD firmware at PNY Technologies and validated storage firmware at IBM. At IBM, I introduced a V-RAID rebuild algorithm that enabled parallelism and scalability, and optimized firmware code to improve rebuild performance by 25%.

Experience

Work history, roles, and key accomplishments

Member of Technical Staff (QA Lead/ QA Manager)

MEXT

Jun 2024 - Jun 2026 (2 years)

• Led QA as a Member of Technical Staff for a 14 person engineering organization, establishing automated regression and release processes that supported 2 beta revisions, 2 production revisions, first customers, development partners, and ultimately acquisition by AMD.
• Defined technical requirements for quality, reliability, and product status metrics used by leadership. Communicated release stat

Senior Memory Test Engineer

Advantest

Apr 2016 - Apr 2024 (8 years)

• Built and maintained 2 MPT3000 courses totaling 36 modules, 12 labs, and 68 hours. This created a services revenue stream for the product line.
• Migrated training to an internal online platform using Articulate 360. Reduced instructor time by approximately 40% and extended training access.
• Trained approximately 250 engineers, including 10 junior Advantest engineers, to develop MPT3000 SSD tes

Firmware Engineer

PNY Technologies

Apr 2015 - Feb 2016 (10 months)

• Designed Defect Mapping, Block Management, and RAID 5 (XOR/parity) modules.
• Coded, tested, and integrated Defect Mapping module of existing SDK.
• Introduced Test Driven Development workflows on Marvell's Eldora ARM Cortex R5 platform, catching defects earlier and raising overall code quality.
• Developed low-level media access commands from NVMe to NAND to enable interface for debug, array ch

Firmware Developer

IBM

Apr 2013 - Mar 2015 (1 year 11 months)

• Validated low-level software and firmware for V-RAID SAS (Serial Attached SCSI) adapters across all storage platforms.
• Introduced new critical path V-RAID rebuild firmware algorithm that allowed parallelism as well as scalability.
• Optimized firmware code to deliver a 25% increase in V-RAID rebuild performance.
• Wrote 8K, maintained 15K, and reviewed 200K lines of code
• Impl