Reshma resh

I am a Hardware-in-the-Loop (HIL) Validation Engineer with hands-on experience commissioning and maintaining production-grade dSPACE HIL environments and vital rigs for ECU validation. I focus on hardware–software integration, ECU I/O mapping, signal scaling, and ensuring reliable closed-loop testing to reduce integration risk.

I have validated ECU functionality over CAN networks using CANoe and CANalyzer, performed fault injection and robustness testing, and contributed to test automation using Keyword-Driven Testing frameworks to enable reusable, repeatable regression testing. I collaborate with system, integration, and development teams to perform test analysis, failure investigation, and root-cause identification.

I am currently pursuing an M.Tech in Communication and Signal Processing, and I bring additional experience developing and deploying a CNN-based image classification model for remote-sensing data, including inference on Xilinx ZCU102 FPGA, combining embedded validation skills with machine-learning awareness.