At Digitalli, I implemented firmware for an automated test jig in C++ with ESP-IDF, using a component-based architecture defined by the project advisor. I built GPIO, ADC, and PWM peripheral components integrated with an ESP32 and controlled by MQTT commands.
In UFSC’s Functional Verification with UVM project, I worked with a research group building testbenches for RTL modules. I developed bus-protocol verification environments with stimulus generation, a C reference model via DPI-C, functional coverage, and SystemVerilog Assertions.
