Charmaine ChanCC
Open to opportunities

Charmaine Chan

@charmainechan

Experienced FPGA Soft IP Design Engineer with strong analytical skills.

Malaysia
Message

What I'm looking for

I am looking for opportunities that foster innovation and collaboration, with a focus on challenging projects in FPGA and embedded systems.

As an FPGA Soft IP Design Engineer at Altera/Intel with 8 years of experience, I excel at leading embedded IP development and specialize in configuration IPs. My strong debugging skills and leadership have allowed me to streamline processes and resolve critical issues effectively. My educational background with distinctions from top universities supports my technical capabilities and commitment to innovation.

I have a proven track record as a technical lead for embedded and configuration IP solutions, responsible for leading engineers in our team for the development and support of 80 IPs in the Quartus catalog. My expertise includes advanced debug techniques and RTL design methodologies, ensuring high-quality standards in FPGA design and validation.

In my previous roles, I focused on validating firmware for FPGA systems and contributed to innovative projects aimed at enhancing connectivity in consumer products. I am passionate about collaborating with cross-functional teams to achieve project goals and drive technological advancements.

Experience

Work history, roles, and key accomplishments

AL
Current

FPGA Soft IP Design Engineer

Altera/Intel

Jun 2019 - Present (6 years 1 month)

Led the development and support of 80 IPs in the Quartus catalog as a technical lead for embedded and configuration IP solutions. Specialized in critical configuration IPs like Partial Reconfiguration and Mailbox, utilizing advanced debug techniques such as Signal Tap to resolve issues and enhance product reliability.

AL

FPGA Firmware Validation Engineer

Altera/Intel

Mar 2018 - Jun 2019 (1 year 3 months)

Conducted rigorous firmware validation for various FPGA products, contributing comprehensive system-level tests for FPGA firmware and IPs. Collaborated with hardware engineers to ensure firmware compatibility and performance, effectively analyzing test results and debugging hardware issues.

Education

Degrees, certifications, and relevant coursework

UG

University of Glasgow

Masters in Electrical and Electronic Engineering, Electrical and Electronic Engineering

Grade: Distinction

Achieved a Distinction in the Master's program, demonstrating advanced knowledge and expertise in the field. Focused on specialized topics within electrical and electronic engineering.

UN

University of Nottingham

Bachelor of Engineering in Electrical and Electronic Engineering, Electrical and Electronic Engineering

Grade: First Class Honours

Graduated with First Class Honours, indicating exceptional academic performance and a strong foundation in electrical and electronic engineering principles. Completed comprehensive coursework and projects in the discipline.

Tech stack

Software and tools used professionally

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Charmaine Chan - FPGA Soft IP Design Engineer - Altera/Intel | Himalayas