Ananya Dongsarwar

Hey!
I am an Electronics and Electrical Engineering undergraduate (CS Minor) at IIT Guwahati passionate about building hardware from the silicon level up. My work focuses on RTL design, computer architecture, and FPGA acceleration, from building a single-cycle RISC-V processor in Verilog to synthesizing custom pipelines on Intel FPGAs. I bring a strong foundation in Verilog, C/C++, Quartus, and Vivado, backed by a relentless drive to tackle complex hardware verification and ASIC front-end challenges. Outside the lab, you'll usually find me shooting hoops or playing minecraft.
Seeking opportunities in RTL Design, Hardware Verification, ASIC Front-End, and FPGA Engineering.

Technical Stack: Verilog, C/C++, Python | Intel Quartus Prime, ModelSim, Xilinx Vivado, LTspice, Linux