Aaroosh Agarwal

I’m a Software Engineer focused on 5G R&D, where I turn 3GPP requirements into reliable, optimized C++ implementations. At Tech Mahindra, I designed and implemented a 5G PHY layer for option 6 split and FAPI setup, supporting 50 Mbps bidirectional traffic with 1:1 real-time synchronization.

I also delivered core uplink control by coding UE uplink power control for PUSCH, PUCCH, SRS, and RAR channels—ensuring 100% 3GPP compliance. Beyond functionality, I’ve improved system performance by boosting simulation efficiency by 50% using Valgrind profiling and GDB, and I enhanced gNB scheduling for custom TDD frame structures while implementing guard slot selection to mitigate signal propagation delay.

I’m hands-on across the stack: I worked on RRC idle state handling, resolved 200+ bugs to raise simulator stability and performance, and implemented Option 7.2x split to decompose gNB into CU/DU/RU units. I’ve also integrated IAB/BAP with F1AP and UE handover per 3GPP Rel 16, strengthened CI/CD regression testing for 30% better coverage, and built a RAG-based QA system (InsightGPT) with OpenAI and Hugging Face using a multi-LLM pipeline.