Sohaib El Aichi

At AION Silicon, I contributed block and full-chip verification across five projects that reached tapeout, including vision, image-processing, and automotive ADAS chips. I work with UVM, SystemVerilog, SVA, and coverage closure, and mentor junior engineers.

On an image-warp block, I reached 100% functional coverage across six micro-architectural changes by writing covergroups and SVA cover properties, then closing coverage holes through designer feedback. I also took vector-processor coverage from 65% to 100% by building and integrating its functional-coverage module and writing directed sequences.

For the vision and image-processing SoC, I drove functional-coverage work across 16+ image-DSP blocks, checking simulation results against the customer’s golden reference model. I also wrote C-based full-chip tests and built the vector processor’s breakpoint verification in C and assembly.

On automotive ADAS and other projects, I implemented coverage for image-DSP filters, verified ECR registers across a full chip, and worked on radar and clock-generator IP. I continuously write Python and Perl automation for the DV flow, and use AI-assisted workflows for debug, coverage-hole analysis, and regression triage; I’m now targeting AI accelerator silicon.