At ARM, I work on a complex multicore SoC/subsystem program, developing and debugging block-to-system integration tests, formal connectivity checks, protocol-checker infrastructure, and coverage-closure strategies. I also work on failure-analysis automation using Python and scripting.
Before ARM, I researched data retrieval methods for vessels at Synthetica and developed Python automation. At Weasic microelectronics, I modelled, tested, and simulated RF sub-blocks and a complete receiver, and designed layout masks and characterized standard cells.

