Hardware Architect (AI Sub-system)

Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

Job Description

Overview

We are seeking a talented and motivated Hardware Architect (AI Sub-system) to join our R&D team to own, define, and drive exploration and design of the next generation hardware for AI sub-system in high performance computing (HPC) SoCs.

Our division’s mission is to use the latest AI and cloud technologies to develop the best AI inference for advanced driver safety engineers building self-driving vehicles and other high performance compute products. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to develop the infrastructure required to deploy our AI software to the billions of devices we ship to customers every year. You will join our newly formed AI & Cloud Engineering organization of around 100 software engineers. Due to strong demand for our AI-related products we are planning to triple in size in the next three years, so there is lots of room for you to help us grow the team together while remaining small. Our team’s key locations are Tokyo, London, Paris, Dusseldorf, Beijing, Singapore, Ho Chi Minh City, and other metropolitan areas, but you can also join fully remotely from other locations globally or get our support to relocate to our key hubs such as Tokyo. 

Responsibilities 

1. Participate and lead in the architecture design of next generation multi-core AI sub-system including CPU/DSP/NPU, memory hierarchies, scalable interconnects, etc.
2. Perform HW/SoC architectural modeling, performance analysis, trade-off analysis, PPA optimization, etc.
3. Deliver architecture specifications to design teams and articulate them effectively across stakeholders ranging from system and software teams to architecture peers, and to technology leadership.
4. Collaborate with silicon and platform bring-up to verify and debug the AI sub-system and its delivered performance.

Qualifications

• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field; Ph.D. is a plus.
• 10 years of experience in SoC and/or ASIC architecture and design.
• Prior direct experience (> 5 years) in NPU architecture design.
• Good knowledge of architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation.

• Preferences 

• Good understanding of current and emerging compute architectures for HPC workload is a plus.
• Experience in NPU, GPU, and micro-processor development is a plus; especially multi-core systems.
• Knowledge of CXL is a plus.
• Knowledge and expertise in ARM and/or RISCV ISAs is a plus.
• Knowledge of Python is a plus.
• Good knowledge of AMBA bus infrastructure (ACE/AXI/AHB).
• Good knowledge of memory subsystems and memory hierarchy designs, including cache coherence protocols, memory models, and NUMA architectures.
• Good coding skill in C/C++ and Verilog/System Verilog.
• Working knowledge of ARM and/or RISCV CPU.
• Working knowledge of existing simulation capabilities (GEM5, FastSIM, Platform Architect) or create new simulation capabilities when necessary.

Additional Information

Hiring will be into all Renesas EMEA and APAC offices, either for hybrid work or remotely

Renesas Electronics Corporation empowers a safer, smarter and more sustainable future where technology helps make our lives easier. The leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at www.renesas.com.

Renesas’ mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.