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Vyacheslav Pachkov

@vyacheslavpachkov

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Senior performance-critical systems engineer specializing in Linux kernel, compilers, and GPU compute optimizations.

Russian Federation

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What I'm looking for

I’m looking for performance-critical systems work where I can own performance-critical paths, build low-latency synchronization, and apply compiler/GPU optimizations to improve throughput and latency.

I’m a performance-critical systems engineer with 5+ years in C and C++ across Linux kernel, compiler backends, and GPU compute. I focus on architecture-aware optimization and reverse-engineering hard, under-documented paths to unlock real throughput and tail-latency improvements.

At YADRO (Feb 2023–Present), I work on Linux kernel / low-latency storage where I developed a userspace write-back cache in C++ (eviction policies, LRU merging, epoch-based flushing). I also architected a kernel module for an active-active clustered software RAID and owned the critical-path data flow across cluster nodes.

I build performance-critical synchronization and coordination—atomics, spinlocks, memory barriers, and lock-free/RCU-style approaches—so hot contention and false sharing don’t dictate latency. In production work, I delivered 2x–7x throughput gains on a clustered RAID kernel data path, plus 2x reduction in worst-case failover latency, supported by SMART-driven predictive failure detection.

Before that, at Huawei (Nov 2020–Feb 2023), I advanced compiler performance: I built a custom calling convention in gollvm bridging Go’s runtime ABI with LLVM codegen, and implemented SSA-level optimizations that achieved up to 6% runtime improvement and 17% optimization impact. I’ve also built a from-scratch OpenCL GPU backend for Tinygrad, reverse-engineering the command submission path for arbitrary kernel execution and achieving 30–50% inference speedups.

Experience

Work history, roles, and key accomplishments

Current

Senior Software Engineer

Current

YADRO

Feb 2023 - Present (3 years 8 months)

Developed a userspace write-back cache and designed/owned a Linux kernel module for active-active clustered software RAID to support high-throughput, low-latency I/O. Built kernel synchronization using atomics/spinlocks/memory barriers, improving degraded-device recovery throughput (2x–7x) and worst-case failover latency (2x).

C#Linux Kernel X86 Assembly OpenPOWER Assembly Python Userspace Write Back Cache Eviction Policies Epoch Based Flushing Atoms Std::Memory_order Memory Barriers False Sharing Avoidance Tail Latency Reduction Performance Optimization

Software Engineer

Huawei

Nov 2020 - Feb 2023 (2 years 3 months)

Built a custom calling convention in gollvm to bridge Go runtime ABI with LLVM code generation. Implemented Go compiler microarchitecture-specific optimizations and SSA-level optimization passes, including enabling BOLT on arm64 (up to 6% runtime improvement and 17% SSA optimization improvement).

C#LLVM Go X86 Assembly Calling Convention Design Instruction Selection Assembly Tuning BOLT Post Link Optimization

Software Engineer Intern

Yandex

Jan 2020 - Jul 2020 (6 months)

Built a real-time log aggregation and visualization layer for an internal distributed logging platform. Worked with infrastructure components and supporting backend/data tooling.

C#Python TypeScript PostgreSQL Real Time Log Aggregation Visualization

Multithreaded build system

MacaronOS

Created a multithreaded build system using concurrent dependency-graph evaluation with cycle detection. Improved full rebuild times by 20% versus CMake.

C#Multithreading Concurrent Dependency Graph Evaluation Build System Performance Optimization

Qualcomm Adreno GPU backend

Tinygrad

Reverse-engineered a userspace command-submission path to enable arbitrary GPU kernel execution for a from-scratch Tinygrad GPU backend. Achieved 30%–50% inference speedup for Tinygrad and Comma.ai autopilot models.

C#Python Reverse Engineering Userspace Command Submission Performance Optimization

Unix-like OS, from scratch

MacaronOS

Built a cross-architecture Unix-like OS from scratch (x86/ARM) including scheduler, paging, VFS, drivers, and UI, targeting Snapdragon 845 hardware (OnePlus 6T).

C#X86 Assembly Schedulers UI