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Omar Moussa

@omarmoussa

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R&D Hardware Engineer at Barco who developed a 10-layer display system and ran signal- and power-integrity simulations.

Belgium

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At Barco, I performed hardware development for a display system built around a 10-layer PCB. I worked with DisplayPort, HDMI, Vx1, USB, I2C, and SPI interfaces, and used HyperLynx for signal- and power-integrity simulations and PCB layout sign-off.

I also brought up and tested PCBA boards, performed display-system integration testing, and developed Zephyr RTOS firmware for an NXP LPCS5569 to control a USB-DP switch. I debugged Gowin LP-FPGA VHDL for display power sequencing and backlight control, and guided a junior colleague and a BSc student.

At ON Semiconductor, I owned end-to-end qualification of ASIC product families under JEDEC and AEC-Q100 standards. I designed burn-in stress boards in Altium, executed qualification plans, and tracked failure analysis through 8D root-cause closure.

Earlier, I supported ASIC tape-outs at IMEC and characterized integrated photonics devices, including ring resonators and Mach-Zehnder interferometers. My work and studies have also included an OTDR design for fiber characterization and a thesis on digital driving for a programmable photonic integrated circuit.

Experience

Work history, roles, and key accomplishments

R&D Hardware Engineer

Barco

Jan 2023 - Jun 2026 (3 years 5 months)

Performed system hardware development of a 10-layer PCB, including power and signal integrity simulations using HyperLynx. Developed embedded firmware for NXP LPC S5569 in Zephyr RTOS and debugged Gowin FPGA VHDL for display power sequencing.

PCB Design Signal Integrity Power Integrity HyperLynx VHDL Zephyr RTOS Embedded Firmware DisplayPort HDMI USB I2C SPI FPGA Debugging

Reliability Engineer (ASICs)

ON Semiconductor

Feb 2019 - Dec 2022 (3 years 10 months)

Owned end-to-end qualification of ASIC product families per JEDEC and AEC-Q100 standards. Designed burn-in stress hardware boards in Altium and coordinated cross-functional teams for qualification milestones.

ASIC Qualification JEDEC AEC Q100 Altium Hardware Design Failure Analysis 8Ds VBA Cross functional Coordination

Internship Student

Koç University

Jun 2021 - Aug 2021 (2 months)

Designed an Optical Time Domain Reflectometer (OTDR) using Lumerical Interconnect for fiber characterization.

Lumerical INTERCONNECT OTDR Testing (Fiber)Fiber Testing

TapeOut Support Engineer

IMEC

Mar 2018 - Aug 2018 (5 months)

Performed DRC, LVS, and antenna verification using Calibre Design for ASIC layouts. Provided tape-out support for ASIC designs based on UMC 130nm and 180nm technologies.

DRC LVS Antenna Verification Calibre Design ASIC Tape Out UMC 130nm UMC 180nm

Teaching Assistantship Grant

Istanbul Sehir University

Sep 2016 - Feb 2018 (1 year 5 months)

Taught Mathematics and Electronics courses to 2nd year electronics EECS students for two semesters. Proctored and marked exams.

Teaching Mathematics Electronics Proctoring Grading

Internship Student

IMEC

Feb 2017 - Jul 2017 (5 months)

Performed device characterization for integrated photonics devices such as ring resonators and Mach-Zehnder interferometers. Conducted optical characterizations for integrated optical bio-sensor systems.

Photonics Device Characterization Microring Resonators Mach–Zehnder Interferometer Optical Characterization Biosensors

Testing Communication Engineer

Department of Defense

Oct 2013 - Apr 2016 (2 years 6 months)

Performed testing and maintenance of PCBA transmitter and receiver radio cards up to 100MHz. Qualified telecommunication instruments according to military standards (MLT_STD).

Testing Maintenance PCBA Radio Cards Military standards Telecommunications

Education

Degrees, certifications, and relevant coursework

Ghent University

Micro-credentials Program, RF Electronics for Photonic Integrated Circuits

2026 -

Ongoing micro-credentials program in RF Electronics for Photonic Integrated Circuits.

Vrije Universiteit Brussel

Master of Science, Photonics

2019 - 2022

European Master of Science in Photonics, joint program between VUB and UGent. Thesis on digital driving via Zynq FPGA for programmable photonic integrated circuits.