Principal Physical Design Engineer

About PradeepIT

Accelerate your career with PradeepIT

PradeepIT is one of the largest, globally recognized IT Consulting firm to connect India's deeply vetted talent team to global customer.

Were headquartered in Bengaluru, Silicon Valley of India. PradeepITs customers include SAP Lab, Bosch, Rolls-Royce, Daikin, Daimler and J&J and hundreds of other Fortune 500 companies and fast-growing startups.

With continuous hard work and working remotely by choice, PradeepIT is certified as a Great Place to Work! Trusted by leading brands and fortune 500 companies from around the world, we have achieved:

6+ Years of Experience

580+ Open source technology Consultant

120+ SAP Consultant

40+ Salesforce Consultant

60+ Adobe Consultant

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890+ Clients in APAC, EMEA & USA

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PradeepIT believes in connecting people across the globe and provide them an opportunity work on remotely. Being a people-first organization, PradeepIT constantly strives for individuals who won't just keep up, but break new ground, work with cutting edge technology and ramp-up their skills with course created by our Vertical Heads, Senior Architect for freely with help of PradeepIT Academy.

ResponsibilitiesAs a Principal Physical Design Engineer, you will be responsible for Physical Design tasks at block, sub-chip, and/or full-chip level. The tasks will include Floorplanning, Synthesis, Placement, CTS and custom clocking, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM. You may also be involved in Physical Design flow development/automation and evaluation of and recommendations for technology, IP, and vendor selection.

You are expected to be able to work with limited direction, have keen attention to detail, and be able to provide crisp status of progress, issues, and risks on the program to the management team. Occasional travel may be required.

QualificationsRequired Qualifications:

• Bachelor's or Masters in Electrical or Computer Engineering or related field with 12+ years of experience
• Experience in tapeouts of complex ASICs in leading edge technology

Preferred Qualifications

• Strong expertise in one or more of the following: synthesis, floorplanning, placement, clock/power grid construction, routing, low power methodologies, and signoff steps (FV, LPV, Extraction, STA, EMIR, Physical Verification, Power Analysis)
• Strong scripting skills
• Proven experience in creating and delivering hard macros and knowledge of guidelines for their integration in SoCs
• Good understanding of foundry tech files and rule decks

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.