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Nipun Kumar

@nipunkumar

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Lead Technical Solutions Engineer specializing in embedded systems development.

India

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What I'm looking for

Seeking principal/staff-level roles in embedded systems — board bring-up, BSP design, low-level drivers, real-time firmware. Open to medical, automotive, storage, networking, industrial, or any embedded domain. Skilled in PCIe/DMA, ARM/TI DSP/ZynqMP, deterministic control, and platform optimization.

I’m an embedded systems specialist with 8+ years of experience designing, developing, and optimizing low-level firmware, device drivers, and board support packages across ARM, TI DSP, RISC-V, and Xilinx ZynqMP SoCs. My work spans complete board bring-up, PCIe/DMA subsystems, real-time control loops, and high-performance embedded Linux platforms (Yocto, Petalinux, Buildroot).

Throughout my career, I’ve delivered production-grade solutions in high-reliability industries — from medical ventilators meeting IEC 62304 standards to high-uptime DAS systems and enterprise storage firmware — consistently reducing latency, improving throughput, and cutting time-to-market. I have a proven track record of reverse-engineering undocumented systems, architecting reusable low-level drivers, and optimizing for cross-compiler portability (MSVC, GCC, GHS).

Recent achievements include replacing a commercial PCIe driver stack with a custom RT-kernel–based implementation that matched performance benchmarks while eliminating ~$25K/year licensing costs, and engineering Petalinux BSPs with deep U-Boot, device tree, and image-generation customizations that boosted boot speed, improved security, and streamlined production.

Beyond hands-on coding, I excel at bridging hardware–software boundaries, mentoring engineers, and architecting maintainable embedded platforms that scale. My interests center on real-time systems, performance tuning, platform bring-up, and pushing the limits of low-level firmware design — whether for high-throughput data paths, deterministic control loops, or complex SoC integrations.

Experience

Work history, roles, and key accomplishments

Current

Lead - Technical Solutions

Current

Soliton Technologies

Jul 2024 - Present (1 year 1 month)

Built PCIe driver from scratch on RT-kernel–patched Linux, replacing Wind River’s Jungo API while matching performance. Designed and implemented 16+ ARM & TI-DSP firmware features including 8kHz real-time control loop, TFTP boot, and SPI-Flash U-Boot-to-Linux chain, enabling rapid prototype bring-up.

PCIe Arm TI DSP Firmware Development Python Socket Programming UART Debugging Image Correction Algorithms C++ Programming

Senior Engineering Consultant

Sigma Connectivity WSI AB

Aug 2023 - Jul 2024 (11 months)

Engineered 10+ Petalinux BSP recipes for ZynqMP SoCs after extensive prototyping, including U-Boot customization for eMMC boot migration from SD-card. Developed low-level C drivers for custom peripherals and automated board programming with Python/Bash, increasing throughput by 40% and reducing programming errors by 20%.

PetaLinux BSP Development ZynqMP SoCs Python BASH I2C WIC Image Generation C C++Yocto Uboot

Senior Engineer-I

Alphawave Semi

Sep 2022 - Jul 2023 (10 months)

Led complete board bring-up for a new hardware platform, architecting & implementing a bare-metal PCIe 3.0 DMA driver for Synopsys IP in C, enabling multi-gigabit transfers across 12+ AI cores. Designed driver architecture to be reusable across low-level peripherals (I2C, SPI, UART), reducing development duplication and accelerating integration for multiple subsystems.

Board Bring Up PCIe DMA Synopsys IP I2C SPI UART RISC V Automated Testing C C++

Firmware Engineer-II

Noccarc

Feb 2021 - Jul 2022 (1 year 5 months)

Completed secure multiprocessor ventilator bring-up with custom BSP & network stack integration, cutting time-to-market by 30%. Developed C++ Linux user-space drivers for I2C sensors/timers achieving >99.9% reliable low-latency MPU–MCU communication.

BSP Development Network Stack Integration I2C LVDS Displays MPU MCU Communication Ventilator Systems C++C Embedded Software

Senior Engineer-I

Western Digital

Mar 2018 - Feb 2021 (2 years 11 months)

Developed portable, interface-agnostic (SAS/SATA) C++14/17 firmware for FPGA, simulator & eHDD platforms with full cross-compiler compatibility (MSVC, GCC, GHS), reducing hardware dependency by 40% and accelerating time-to-market by 25%. Built HAL for custom ASIC IPs in simulation, enabling early-stage firmware validation & cutting project timelines by 20%.