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la quoc anh

@laquocanh

Message

I build embedded, wireless, Linux, and Edge AI systems from firmware to deployment.

Vietnam

Message

I'm building NPU compiler tooling at Vietsol Edge AI, analyzing TFLite-to-NPU deployment pipelines and optimizing models for target hardware.

At FPT Software, I delivered embedded and IoT systems spanning AM335x Linux hosts, MCU firmware, industrial data acquisition, Modbus devices, remote servers, and resilient Ethernet/3G delivery.

I've built real-time video and audio streaming systems, multi-node Wi-Fi and Sub-GHz networks, GPS tracking devices, electronic shelf labels, secure BLE products, and sensor-fusion pipelines using Extended Kalman Filters.

I work across embedded C/C++, Python, Linux, wireless protocols, board bring-up, device drivers, low-power design, security, and Edge AI—balancing performance, power, reliability, and constrained resources.

Experience

Work history, roles, and key accomplishments

Current

Embedded AI Developer

Current

Vietsol

May 2026 - Present (4 months)

Analyzed the end-to-end model deployment pipeline from TFLite graph conversion to NPU execution, including operator mapping, intermediate representations, and compiler behavior. Developed compiler tool to convert and optimize TFLite models for deployment on the target NPU.

Ghidra MLIR LLVM TFLite Python

Senior Embedded Software Engineer

FPT Software

Sep 2020 - Apr 2026 (5 years 7 months)

Integrated an end-to-end industrial data acquisition system spanning an AM335x Linux host, MCU-based acquisition, analog/digital inputs, Modbus RTU/TCP devices, local storage, HMI, PC applications, and remote servers. Defined and implemented hardware/software interfaces and data flows between the Linux host, MCU, sensors, Modbus devices, and external applications.

TI Sitara Embedded Linux Buildroot Modbus Ethernet FTP UART Sigma Delta ADC JSON Lua Python

Embedded Software Engineer

M1 Communication Viettel

Sep 2017 - Mar 2020 (2 years 6 months)

Studied GPS signal generation and modulation algorithms, including I/Q and BPSK modulation. Implemented signal-generation algorithms on a Xilinx Zynq-7000 FPGA platform by translating C-based processing into Verilog.

FPGA Verilog Vivado Vivado HLS I Q Modulation