
GUJJULA MANIKANTAREDDY
@gujjulamanikantaredd
Analog Layout Design Trainee at AIIT Institute, working on op-amp and standard-cell layouts in a TSMC 40 nm environment.
What I'm looking for
At AIIT Institute, I'm training in custom analogue and digital layout using Cadence Virtuoso XL and Calibre in a TSMC 40 nm environment. I practise floorplanning, placement, routing, and physical verification of circuit blocks.
On an operational amplifier layout project, I worked on layout blocks and sub-blocks including current mirrors, differential amplifiers, and start-up circuits. I also practised identifying and resolving antenna-effect and ESD-related layout issues.
I worked on a digital standard-cell library that included cells such as INV, NAND, DFF, decoders, and multiplexers. The training work covered floorplanning, routing, power routing, and verification using DRC, ERC, and LVS.
Experience
Work history, roles, and key accomplishments
Analog Layout Design Trainee
AIIT Institute
Jun 2024 - Present (2 years 5 months)
Undertaking training in custom analogue and digital layout using Cadence Virtuoso XL and Calibre in a TSMC 40 nm environment. Practising floorplanning, placement, routing and physical verification of circuit blocks.
Education
Degrees, certifications, and relevant coursework
Kallam Haranadhareddy Institute of Technology
B.Tech, Engineering
Grade: 7.8
Completed B.Tech in 2024 with a grade of 7.8.
Sri Chaitanya Junior College
Intermediate, Intermediate
Grade: 7.8
Completed Intermediate in 2020 with a grade of 7.8.
Z.P.H. High School
SSC, SSC
Grade: 7.0
Completed SSC in 2018 with a grade of 7.0.
Tech stack
Software and tools used professionally
Availability
Location
Authorized to work in
Salary expectations
Social media
Job categories
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