Innatera is a rapidly growing Dutch semiconductor company that develops ultra-efficient neuromorphic processors for AI at the edge. The company is committed to driving innovation and delivering exceptional results while creating an environment where teams can thrive.
Requirements
- Develop and maintain SystemVerilog/UVM-based verification environments at both module and SoC level
- Write test sequences, define functional coverage models, and ensure coverage closure
- Debug simulation results using waveform tools and collaborate with design teams to resolve issues
- Drive constrained-random stimulus generation and continuous improvements in our verification methodology
- Apply modern EDA tools and automate verification flows to maximize speed and quality
- Contribute to quality assurance, release-readiness, and design-test alignment for every chip
Benefits
- Competitive salary
- Pension plan
- Flexible working environment
- Generous holiday scheme
- Collaborative, ambitious team with the freedom to innovate
- Inclusive culture that values openness, curiosity, and personal growth
- Office perks like fresh fruit, snacks, and an on-site gym
- Statutory commuting/home allowance
