United States onlyLead RTL-to-gates implementation using Cadence Genus for GF 22FDX, drive synthesis strategy, constraint management, and multi-mode multi-corner (MMMC) optimization. Collaborates cross-functionally with RTL, verification, and backend teams to minimize ECO cycles and accelerate signoff readiness.
Requirements
- 8+ years’ hands-on experience in ASIC synthesis with Cadence or Synopsys tools.
- Deep expertise in SDC constraint writing, clock gating, and hierarchical synthesis.
- Familiarity with GF 22FDX standard cells, libraries, and foundry requirements.
- Proven track record of leading synthesis flow improvements and methodology development.
Benefits
- 15 days of PTO per calendar year
- 10 paid Holidays per calendar year
- Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
- Dental & Vision: Company covers 50% of premiums for Employee and Dependents
- Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
- Employee Assistant Program (EAP)
- 401k - Traditional & Roth
- Life/AD&D and Long-Term Disability
- Tuition reimbursement
CN, SG + 2 more