Senior DFT Engineer

Axelera AI is looking for a Senior DFT Engineer to join their multicore in-memory-compute SoC team. The candidate will design, implement, and validate test solutions for complex SoCs, collaborating with a talented team of engineers across Europe.

Requirements

• 5+ years of experience in DFT engineering
• SystemVerilog RTL, TCL, Python, Unix/Linux workflows
• Hierarchical scan, ATPG, Memory BIST, JTAG/IJTAG, fault simulation, silicon debug, gate-level verification
• Siemens, Synopsys, or Cadence DFT tool experience

Benefits

• Attractive compensation package
• Pension plan
• Extensive employee insurances
• Option to get company shares