# Hire the best remote SoC Interface Connectivity Analysis employees

Discover 6 remote SoC Interface Connectivity Analysis workers who are looking for their next full-time, part-time or freelance opportunity on Himalayas.

Source: https://himalayas.app/talent/soc-interface-connectivity-analysis

## 6 remote workers

| Person | Role | Location | Salary expectations | Intro |
| --- | --- | --- | --- | --- |
| [veda s](https://himalayas.app/@vedas) | ASIC Design Engineer | India |  | RTL/ASIC Design Engineer specializing in RTL quality, CDC sign-off, and SoC integration. |
| [Sambhav Sharma](https://himalayas.app/@sambhavsharma1) | Hardware Engineer | India | 145k+ INR | Associate Hardware Engineer at Qualcomm who automated SoC connectivity analysis and built structured interface data pipelines. |
| [Νίκος Λαδιάς](https://himalayas.app/@0007988) | Verification Engineer | Hungary | 52k+ EUR | Verification engineer at ARM developing multicore SoC integration tests, formal connectivity checks, and coverage-closure strategies. |
| [RAVINDRA SINGH](https://himalayas.app/@ravindrasingh6) | Design Verification Engineer | Ireland | 90k+ EUR | IP/SoC design verification consultant at Logixchip Technologies, verifying AI compute SoCs and die-to-die interconnects. |
| [Pragati Piragannavar](https://himalayas.app/@pragatipiragannavar) | ASIC and SoC Design Engineer | India | 6949k+ INR | ASIC and SoC design verification engineer who verified an AXI4-Lite slave and built RTL projects including a RISC-V RV32I processor. |
| [Ritesh Jadhav](https://himalayas.app/@riteshjadhav2) | RTL Design Engineer | India | 70k+ INR | RTL design engineer at Accenture who developed DMA, I3C, and SHA IPs and implemented I3C protocol features. |

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To contact someone, message them from their profile with a Himalayas employer account: [Hire on Himalayas](https://himalayas.app/hire).