# Preetham YG

Preetham YG is a remote worker on Himalayas, VLSI Design Verification Trainee at ChipEdge, based in India.

Source: https://himalayas.app/@preethamyg

```text
VLSI Design Verification Trainee at ChipEdge who verified APB and AXI protocols using SystemVerilog and UVM.
```

| Detail | Value |
| --- | --- |
| Availability | Looking for a job |
| Location | India |
| Authorized to work in | India |
| Salary expectations | 70k+ INR |
| Job categories | VLSI Engineer |
| Skills | RTL Verification, Functional Verification, UVM Methodology, SystemVerilog, Verilog, APB, AXI, AMBA Protocols, TestBench Development, SystemVerilog Assertions, Functional Coverage, Constraint Random Verification, Object Oriented Programming, C, C++ |
| LinkedIn | https://linkedin.com/in/preetham2184 |

## About

```text
At ChipEdge, I received hands-on training in Verilog and SystemVerilog for RTL design and functional verification. I developed SystemVerilog testbench components and worked on protocol verification and UVM-based testbench development.

For my APB protocol verification project, I developed a UVM-based environment for read/write transactions. I verified the IDLE, SETUP, and ACCESS phases using constrained-random stimulus, assertions, and functional coverage.

For my AXI protocol verification project, I developed a UVM-based environment for read/write transactions and verified VALID/READY handshaking across the address, data, and response channels. I debugged simulation failures using Synopsys VCS and waveform analysis.

I also published a paper on “IOT in Aquaponics enhancing efficiency and Productivity” in INTERNATIONAL JOURNAL OF ADVANE RESEARCH AND INNOVATIVE IDEAS IN EDUCATION.
```

## Experience

### VLSI Design Verification Trainee

ChipEdge. May 2026 - Nov 2026

```text
Received hands-on training in Verilog and SystemVerilog for RTL design and functional verification. Developed SystemVerilog testbench components and worked on APB and AXI protocol verification using UVM.
```

Skills: Verilog, SystemVerilog, UVM-Methodology, Object-Oriented-Programming, Constraints, Assertions, Functional-Coverage, APB, AXI, Synopsys-VCS, Linux, Waveform-Debugging

## Education

### S J M Institute of Technology

Bachelor of Engineering, Electronics and Communication. Grade: CGPA 7.9

```text
Pursuing Bachelor of Engineering in Electronics and Communication with a CGPA of 7.9.
```

### G V P College

Board of Technical Education. Grade: 74.95%

```text
Completed Board of Technical Education with an aggregate of 74.95%.
```

### Don Bosco School

State Board. Grade: 67.20%

```text
Completed State Board education with an aggregate of 67.20%.
```

## Tech stack

- Python
- C++
- C
- Linux
- Verilog

To contact Preetham, message them from this profile with a Himalayas employer account: [Hire on Himalayas](https://himalayas.app/hire).

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