# Chitrangi Kasliwal

Chitrangi Kasliwal is a remote worker on Himalayas, Research Intern at Advanced VLSI Laboratory, IET, DAVV, based in India.

Source: https://himalayas.app/@chitrangikasliwal

```text
VLSI research intern at Advanced VLSI Laboratory, IET, DAVV who translated a MATLAB JPEG prototype into a 14-module Verilog codec.
```

| Detail | Value |
| --- | --- |
| Availability | Looking for a job |
| Location | India |
| Authorized to work in | India |
| Salary expectations | 70k+ INR |
| Job categories | VLSI Engineer, Hardware Security Engineer, Verification Engineer, Electronics Engineer |
| Skills | Verilog, SystemVerilog, RTL Design, Hardware Security, VLSI Design, Digital Electronics, Logic Design, Static Timing Analysis, Constraint Random Verification, Test Classes, FIFO Design, UART, Finite State Machines, Clock Domain Crossings, Metastability |

## About

```text
At Advanced VLSI Laboratory, IET, DAVV, I reviewed JPEG compression literature and built a MATLAB prototype to validate fixed-point arithmetic choices. I translated that prototype into a 14-module Verilog RTL codec on Kintex-7 as the basis for hardware Trojan insertion research.

My projects include a class-based SystemVerilog verification testbench for a synchronous FIFO, where eight data integrity checks passed across four test scenarios, and a parameterizable UART transceiver verified in Vivado XSim. I work with Verilog, SystemVerilog, Vivado, and XSim, and have also trained and evaluated supervised ML models using Python, NumPy, and Pandas.
```

## Experience

### Research Intern

Advanced VLSI Laboratory, IET, DAVV. Jun 2026 - Jul 2026

```text
Reviewed JPEG compression literature, built a MATLAB prototype validating fixed-point arithmetic choices, and translated it into a 14-module Verilog RTL codec on Kintex-7 as the basis for hardware Trojan insertion research.
```

Skills: Matlab, Verilog, Kintex-7, Vivado, Fixed-Point-Arithmetic, JPEG-Compression, Hardware-Security

### Trainee Intern

MoreYeahs IT Technologies Pvt. Ltd.. Dec 2025 - Dec 2025

```text
Trained and evaluated supervised ML models using Python, NumPy, and Pandas, covering data preprocessing, feature engineering, and performance metrics on structured datasets.
```

Skills: Python, NumPy, Pandas, Machine-Learning, data-preprocessing, Feature-Engineering

## Education

### National Institute of Technology, Rourkela

Bachelor of Technology, Electrical Engineering. 2024 - Present. Grade: CGPA: 7.98

```text
Pursuing a Bachelor of Technology in Electrical Engineering with a current CGPA of 7.98.
```

### Advanced VLSI Laboratory, IET, DAVV

Research Internship, Hardware Security. 2026 - 2026

```text
Research Internship in Hardware Security under Dr. Vaibhav Neema.
```

### Indore Public School, Indore

CBSE, Science (PCM). Grade: 93.6%

```text
Completed CBSE Science (PCM) with 93.6%.
```

### MoreYeahs IT Technologies Pvt. Ltd.

Trainee Internship, AI/ML. 2025 - 2025

```text
Trainee Internship in AI/ML covering data preprocessing, feature engineering, and performance metrics.
```

### MathWorks

MATLAB Onramp, MATLAB

```text
Completed MATLAB Onramp certification.
```

## Tech stack

- NumPy
- Pandas
- Python
- MATLAB

To contact Chitrangi, message them from this profile with a Himalayas employer account: [Hire on Himalayas](https://himalayas.app/hire).

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